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In the last hang the third debug field is 80. The bit that is set is TXRST in ECON1 which resets the
Ethernet transmitter. This bit must be cleared after it is set to release the transmitter.
In the ECON1 register bit 2 which is RXEN must be set to 1 to be able to receive packets.
Got another hang with 8|1|84|1 on the LCD.